FPGA GPU ultrasound beamformer:
choose the right architecture.

Architecture before processor choice

FPGA, GPU or hybrid: first decide what must cross the interface

An FPGA GPU ultrasound beamformer is a system architecture, not a universal performance guarantee. The useful question is where to place acquisition control, receive processing, reconstruction and image output while retaining the data needed for the intended modes.

A GPU can perform beamforming; an FPGA can process more than acquisition timing. A hybrid system can split these tasks in different ways. Choose the split from data rate, timing, power and verification requirements, not from the assumption that one processor type always produces better images.

Three practical architecture choices

NVIDIA's ultrasound development example demonstrates GPU-based processing from RF data using a programmable acquisition platform. It is a historical developer-kit example, not proof that an arbitrary GPU delivers the same result or that ALEVA has reproduced its performance. NVIDIA technical example, 2021.

A raw-data budget you can calculate before buying

For continuous, uncompressed acquisition, payload rate is active receive channels × sample rate × stored bytes per sample. For event-based capture, use channels × stored samples per event × events per second × stored bytes per sample. These models exclude headers, metadata and transport overhead; distinguish burst rate from average payload.

Changing duty cycle, packing or front-end processing changes the link budget. Sending beamformed IQ or images can reduce traffic but gives the downstream algorithm different information. A data-rate reduction is not automatically lossless or interchangeable with raw channel access.

Measure sensor-to-output latency, not only the beamforming kernel

A kernel benchmark leaves out acquisition, queueing, link transfer, memory copies, scheduling and display. Define a common timestamp reference and specify median, tail latency, startup behavior, dropped acquisitions and sustained workload. A visually smooth image is not proof that every acquisition arrived.

NVIDIA's Holoscan Sensor Bridge 2.7 documentation describes FPGA-to-host sensor traffic and optional RDMA into GPU memory with suitable hardware. Its architecture shows why transport and host design belong in the budget; it is not itself an ultrasound beamformer. Architecture documentation.

Do not assume that a compatible-looking GPU and network card guarantee the required path. NVIDIA's host-setup documentation includes platform-specific restrictions; verify the actual host, NIC, PCIe topology, drivers and supported receiver configuration. Host setup.

What to ask an ultrasound beamformer OEM supplier

1. Acquisition: Which transmit sequences, active Tx/Rx channels, sample formats, timing references and calibration records are available?
2. Output: Is access raw channel RF, channel IQ, beamformed IQ or image data? What metadata and units accompany it?
3. Performance: Under which probe, depth, event count, reconstruction grid and host were throughput and latency measured?
4. Sustained behavior: What happens under thermal load, host stalls, link congestion or exhausted buffers?
5. Reproducibility: Are firmware, software, processing settings and test inputs identified so results can be compared?
6. Commercial scope: What is supplied, licensed or transferred? Who maintains firmware, SDK interfaces and future host support?

Use the existing release-baseline guide and observable capture-loss guide for deeper verification questions. These are complementary topics, not replacements for this architecture-selection decision.

Match the architecture to the OEM product

For a handheld device, measure the complete power and thermal budget, including the host and transport. For a research platform, clarify which data must remain accessible for future algorithms. For production supply, settle calibration, test records, software ownership and lifecycle support before treating a prototype result as a delivery commitment.

ALEVA's beamformer service describes FPGA/GPU engineering and project-specific supply or technology-transfer models. Discuss the intended probe, data access and verification requirements with the team. This guide does not add a new supported configuration, benchmark, certification or production-availability claim.

FPGA GPU ultrasound beamformer questions

Sources and evidence boundaries

• NVIDIA Clara AGX ultrasound development example, 2021; historical platform example.
• NVIDIA Holoscan Sensor Bridge architecture, version 2.7 as inspected October 13, 2026.
• NVIDIA Sensor Bridge host setup; verify the exact host configuration.
• ALEVA engine guide; company-described scope.

Architecture recommendations are ALEVA editorial synthesis. The bandwidth calculation is a transparent illustrative model, not a measured hardware result. No private architecture or customer data is disclosed.